The present invention generally relates to circuit protection. More specifically, the present invention relates to voltage variable materials.
Electrical overstress (“EOS”) transients produce high electric fields and usually high peak power that can render circuits or the highly sensitive electrical components in the circuits, temporarily or permanently non-functional. EOS transients can include transient voltages capable of interrupting circuit operation or destroying the circuit outright. EOS transients may arise, for example, from an electromagnetic pulse, an electrostatic discharge, lightning, a build-up of static electricity or be induced by the operation of other electronic or electrical components. An EOS transient can rise to its maximum amplitude in subnanosecond to microsecond times and have repeating amplitude peaks.
Materials exist for the protection against EOS transients, which are designed to respond very rapidly (ideally before the transient wave reaches its peak) to reduce the transmitted voltage to a much lower value for the duration of the EOS transient. EOS materials are characterized by high electrical resistance values at low or normal operating voltages. In response to an EOS transient, the materials switch very rapidly to a low electrical resistance state. When the EOS dissipates, these materials return to their high resistance state. EOS materials also recover very rapidly to their original high resistance value upon dissipation of the EOS transient.
EOS materials are capable of repeated switching between the high and low resistance states. EOS materials can withstand thousands of ESD events and recover to desired off-status after providing protection from each of the individual ESD events.
Circuits employing EOS materials can shunt a portion of the excessive voltage or current due to the EOS transient to ground, protecting the electrical circuit and its components. Another portion of the threat transient reflects back towards the source of the threat. The reflected wave is either attenuated by the source, radiated away, or redirected back to the surge protection device, which responds in kind to each return pulse until the threat energy is reduced to safe levels. A typical circuit employing an EOS transient device is illustrated in FIG. 1.
With reference to FIG. 1, a typical electrical circuit 10 is illustrated. The circuit load 12 in the circuit 10 operates at a normal operating voltage. An EOS transient of substantially more than two to three times the normal operating voltage having a sufficient duration can damage the load 12 and the components contained therein. Typically, EOS threats can exceed the normal operating voltage by tens, hundreds or even thousands of times the voltages seen in normal operation.
In the circuit 10, an EOS transient voltage 14 is shown entering the circuit 10 along line 16. Upon the occurrence of the EOS transient voltage 14, an EOS protection device 18 switches from the high resistance state to a low resistance state thus clamping the EOS transient voltage 14 at a safe, low value. The EOS protection device 18 shunts a portion of the transient threat from the electronic line 16 to the system ground 20. As stated above, the EOS protection device 18 reflects a large portion of the threat back towards the source of the threat.
EOS protection devices typically employ a voltage variable material (“VVM”). Many VVM's have been of a consistency and make-up that they have required some type of housing or encapsulation. That is, the VVM materials have heretofore been provided in a device, such as a surface mount device, mounted to a printed circuit board (“PCB”). The VVM devices typically have been mounted discretely from the devices of the circuit that require protection. This presents a variety of problems.
First, VVM devices add to the number of components that are required to be mounted to the PCB. The VVM devices consume valuable board space and add to the potential for defects. The VVM devices typically require that additional pads be secured to the PCB and that additional circuit traces be routed from PCB devices or from a ground plane to the VVM pads. It is always desirable for cost, spacing/flexibility and reliability purposes, to reduce the number of components mounted to a PCB.
Second, adding components to an existing PCB can require a board redesign or other type of incorporation into a currently pending design. If the application is already in production, it is likely that a considerable amount of time has been spent optimizing board space, which may or may not leave room to integrate a VVM device.
Third, many EOS transients occur outside of the PCB and are transmitted to the PCB through cables and wires. For instance, networked computer and telephone systems are subject to a variety of transients caused by environmental and handling activities. In these situations, it would be desirable to eliminate voltage transients before they reach the PCB.